One of many errors. Another is saying that all memories support writing data. Apparently this author has never heard of ROM. Or CD and DVD drives. Or neglected to carefully read the ai assisted parts.
Yes I agree, ROM, CD, and DVD are read-only drives. But the manufacturer writes the data.
My perspective comes from hardware design, where even for read-only drives, the data-writing decision is made during manufacturing.
Example: When using a precomputed lookup table for the AES S-Box, ROMs are designed to create memory banks for faster arithmetic operations. During the design phase, you must make careful trade-offs regarding how much space to allocate for storing precomputed values. From the start, you need to floorplan how to write these precomputed arrays to achieve realistic space allocation. For this reason, algorithms like Canright's Boolean network are more suitable for compact design and are more efficient at reducing physical memory area.
It was my mistake to write it as general-purpose, and my wording was confusing. Thank you for highlighting this. I will read the article again and improve the writing.
You are right, I wrote in an oversight that "Zero access latency" is practically possible within some margin. I was reading the book "The Cache Memory by Jim Handy" and on section 2.1.3 which says:
"Occasionally, a designer will allow the CPU address to propagate
through the address buffers to the bus at the beginning of every cycle,
whether the cycle turns out to be a read hit or a read miss. The cache is
designed in such a way as to initiate a main memory access at the same
time as the cache access, rather than to wait for a cache miss before
commencing the main memory access. This approach can shorten the
main memory access time in the event of a cache miss and will serve to
improve the operation of singleprocessor, single-tasking systems, but
can work to the detriment of multitasking systems and multiprocessing
systems, since the cache will allow the CPU to waste considerable
amounts of main memory bus bandwidth. Such caches can be referred
to as look aside designs. Since the processor has the option of going to
either the cache or main memory at all times to request data, the look
aside cache can be an add-on to the computer system."
Because the book mainly focused on the older i386 processor memory design, I could have been clearer when describing common characteristics. I updated the common characteristics to include "Higher data-rate processing," which is relevant to the Prefetch architecture and its intent to support more data bits.
The text does not have any of the superfluous words typical for Claude/OpenAI talk.
It is written like an answer to "Explain to me like I am 5", but it contains appropriate information for such a context.
Only towards the end of the article, there are some signs that indicate AI editing, like a too frequent use of the word "simply", e.g.:
> "The one-clock-cycle delay introduced by an RDIMM is not simply a penalty. It results from pipelining the memory interface. "
This would have been better just: "The one-clock-cycle delay introduced by an RDIMM results from pipelining the memory interface."
Overall, it seems that the AI contribution was minimal.
The problem is that for scientific/technical texts it will always be impossible to determine whether they are written by a human or by an AI, in the case when they are correct.
For now, we detect easily the AI generated texts even for scientific/technical information only because they are bad, by including a lot of non-necessary words or by making unexpected mistakes. When the AI-generated text describing some scientific/technical fact will be flawless, it will not be distinguishable from what a competent human will say about the same content.
TFA might have been 100% AI-generated, but in that case it was a better AI than what has generated the immense quantity of slop that I have seen on the Internet lately, which is very easily recognizable as AI-generated, after reading just a few sentences, unlike the article linked by this thread.
What is absolutely certain is that about the first 100 words of TFA it is impossible to distinguish whether they have been written by a human or by a very good AI. If Pangram says that it is 100% confident that it was an AI, that is proof that Pangram is an 100% unreliable tool, so anyone who uses it makes a big mistake.
Author might have spend days researching it, selecting what to include and what not to, revising the language and graphics, then comes Pangram and slaps 100% AI on it without looking into the substance.
Unfortunately, given the sheer magnitude of text on the internet, we need heuristics to gauge whether something is worth reading or not.
For authors/blogs that I don't yet know, LLM-generated text is a clear anti-signal for me, and Pangram has been very useful in that regard.
False positives (Pangram labels something slop that isn't) I'm not that worried about, since the worthwile articles generally circle back to me some way through the communities I'm involved in, so I like to err on the side of not instantly reading something anyways.
For false negatives, that depends on the type of article at hand. If an error leads to me spending 2 minutes reading an article that ended up being not worth reading I'd be fine with an order of magnitude more than if false positives happen on articles that take 30 minutes to go through. Maybe on the order of 1-3% overall?
> Common Characteristics of Memory > - Zero access latency
It's incorrect, and simply wrong.
One of many errors. Another is saying that all memories support writing data. Apparently this author has never heard of ROM. Or CD and DVD drives. Or neglected to carefully read the ai assisted parts.
Yes I agree, ROM, CD, and DVD are read-only drives. But the manufacturer writes the data. My perspective comes from hardware design, where even for read-only drives, the data-writing decision is made during manufacturing.
Example: When using a precomputed lookup table for the AES S-Box, ROMs are designed to create memory banks for faster arithmetic operations. During the design phase, you must make careful trade-offs regarding how much space to allocate for storing precomputed values. From the start, you need to floorplan how to write these precomputed arrays to achieve realistic space allocation. For this reason, algorithms like Canright's Boolean network are more suitable for compact design and are more efficient at reducing physical memory area.
It was my mistake to write it as general-purpose, and my wording was confusing. Thank you for highlighting this. I will read the article again and improve the writing.
That's where I stopped reading. It's just so egregiously wrong I didn't have faith in the rest of the article being useful.
You are right, I wrote in an oversight that "Zero access latency" is practically possible within some margin. I was reading the book "The Cache Memory by Jim Handy" and on section 2.1.3 which says:
"Occasionally, a designer will allow the CPU address to propagate through the address buffers to the bus at the beginning of every cycle, whether the cycle turns out to be a read hit or a read miss. The cache is designed in such a way as to initiate a main memory access at the same time as the cache access, rather than to wait for a cache miss before commencing the main memory access. This approach can shorten the main memory access time in the event of a cache miss and will serve to improve the operation of singleprocessor, single-tasking systems, but can work to the detriment of multitasking systems and multiprocessing systems, since the cache will allow the CPU to waste considerable amounts of main memory bus bandwidth. Such caches can be referred to as look aside designs. Since the processor has the option of going to either the cache or main memory at all times to request data, the look aside cache can be an add-on to the computer system."
Because the book mainly focused on the older i386 processor memory design, I could have been clearer when describing common characteristics. I updated the common characteristics to include "Higher data-rate processing," which is relevant to the Prefetch architecture and its intent to support more data bits.
Pangram says the first 100 words are 100% AI slop.
(Don't shoot the messenger, just trying out Tangram for the first time.)
Pangram is wrong.
The text does not have any of the superfluous words typical for Claude/OpenAI talk.
It is written like an answer to "Explain to me like I am 5", but it contains appropriate information for such a context.
Only towards the end of the article, there are some signs that indicate AI editing, like a too frequent use of the word "simply", e.g.:
> "The one-clock-cycle delay introduced by an RDIMM is not simply a penalty. It results from pipelining the memory interface. "
This would have been better just: "The one-clock-cycle delay introduced by an RDIMM results from pipelining the memory interface."
Overall, it seems that the AI contribution was minimal.
The problem is that for scientific/technical texts it will always be impossible to determine whether they are written by a human or by an AI, in the case when they are correct.
For now, we detect easily the AI generated texts even for scientific/technical information only because they are bad, by including a lot of non-necessary words or by making unexpected mistakes. When the AI-generated text describing some scientific/technical fact will be flawless, it will not be distinguishable from what a competent human will say about the same content.
TFA might have been 100% AI-generated, but in that case it was a better AI than what has generated the immense quantity of slop that I have seen on the Internet lately, which is very easily recognizable as AI-generated, after reading just a few sentences, unlike the article linked by this thread.
What is absolutely certain is that about the first 100 words of TFA it is impossible to distinguish whether they have been written by a human or by a very good AI. If Pangram says that it is 100% confident that it was an AI, that is proof that Pangram is an 100% unreliable tool, so anyone who uses it makes a big mistake.
Author might have spend days researching it, selecting what to include and what not to, revising the language and graphics, then comes Pangram and slaps 100% AI on it without looking into the substance.
Unfortunately, given the sheer magnitude of text on the internet, we need heuristics to gauge whether something is worth reading or not. For authors/blogs that I don't yet know, LLM-generated text is a clear anti-signal for me, and Pangram has been very useful in that regard.
What false positive rate would you regard as still acceptable for your use case?
False positives (Pangram labels something slop that isn't) I'm not that worried about, since the worthwile articles generally circle back to me some way through the communities I'm involved in, so I like to err on the side of not instantly reading something anyways.
For false negatives, that depends on the type of article at hand. If an error leads to me spending 2 minutes reading an article that ended up being not worth reading I'd be fine with an order of magnitude more than if false positives happen on articles that take 30 minutes to go through. Maybe on the order of 1-3% overall?
One of the best articles on Computer Memory that I have ever read!
(Worth re-reading in the future!)
See also:
https://flashdba.com/storage-for-dbas/